Senior Staff Manager, Physical Design - Ho Chi Minh City, Ho Chi Minh City

We are seeking motivated Physical Design Engineers to join our engineering team in Vietnam. · ...

We are hiring Physical Design Engineers for two specialization tracks: STA (Static Timing Analysis) and EMIR (Electromigration & IR Drop). Candidates may choose the track that best fits their expertise. · ...

Mô tả công việc: · (Mức lương: Thỏa thuận) · Perform Static Timing Analysis (STA), validation, and debug across multiple PVT conditions using Tempus. · Execute DMMMC flow for STA and logical/physical aware ECO flows focusing on timing and leakage optimization. · Manage STA setup, ...

Mô tả công việc: · (Mức lương: Thỏa thuận) · Perform EMIR analysis using ASIC EMIR tools (RHSC and/or Voltus). · Enable EMIR tools for new process nodes and latest technology features. · Create reference flows to evaluate tools and EM tech files, PDK collaterals (precisely RV tec ...

About HCLTech Vietnam Company Limited · HCLTech is a global technology company, home to more than 226,600 people across 60 countries, delivering industry-leading capabilities centered around digital, engineering, cloud, and AI, powered by a broad portfolio of technology services ...

About Marvell · Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. · Bachelor's, Master's or PhD degree in Electrical Engineering Computer Engineering or a related field. · 3+ years of experience in physical des ...

This is an internship opportunity at Marvell for a Physical Design Engineer where you will participate in next-generation physical design implementation and verification activities of complex SOC designs. · ...

Job Description · Physical layout design for chiptop, subsystem or partition level, including Synthesis, Place & Route, Physical verification, Static Timing Check, Power design network, Power Verification, ... · Collaborate with related teams to finish design within define sche ...

We are building a premium direct to consumer brand focused on high performance paper airplanes and DIY flight kits. · ...

About Marvell · Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. · At Marvell, you can affec ...

+As a senior leader in the central physical design team, you will shape the long-term vision for physical design capabilities and infrastructure in alignment with company-wide technology strategy. · +Lead RTL-to-GDSII implementation for multiple SoC programs · Provide strategic l ...

We are seeking motivated Physical Design Engineers to join our engineering team in Vietnam.You will be responsible for physical design, verification, logic/circuit/RTL design, · Front-End Physical Design · ...

We are looking for a good SOC physical design engineer to execute full ASIC/SoC Physical Design flow. · The role involves driving timing closure and PPA optimization using PrimeTime/Tempus and Innovus/ICC2. · ...

We're hiring a physical design engineer with experience in ASICs and EDA tools. The candidate should have hands-on experience in large ASICs, strong command of Cadence-based tools, and familiarity with CPU/DSP architecture. · ...

We are hiring Physical Design Engineers for two specialization tracks: STA (Static Timing Analysis) and EMIR (Electromigration & IR Drop). Candidates may choose the track that best fits their expertise. · ...

About HCLTech Vietnam Company Limited · HCLTech is a global technology company, home to more than 226,600 people across 60 countries, delivering industry-leading capabilities centered around digital, engineering, cloud, and AI, powered by a broad portfolio of technology services ...

Perform EMIR analysis using ASIC EMIR tools (RHSC and/or Voltus). Enable EMIR tools for new process nodes and latest technology features. · ...

We are looking for a Staff Physical Design Engineer to join our team. As a key member of our design team, you will be responsible for physical layout design for chiptop, subsystem or partition level. · Collaborate with related teams to finish design within define schedule. · Mana ...

We are seeking a highly motivated individual to lead our mixed-signal IP team in implementing complex IPs and test chips. · ...

Drive the physical implementation of high-speed interface IPs from RTL to GDS, ensuring timing and physical sign-off. · Leading the physical implementation of high-speed interface IPs from RTL to GDS, ensuring timing and physical sign-off. · ...